Program

Michel Bourdelles — 2012-06-04T13:43:35Z

10:00-10:10 Welcome & Agenda

10:10-10:40 RT-SIMEX : Performance Retro-modelling

This presentation presents the final results from the French ANR project RT-Simex. RT-Simex proposes a set of tools to analyze timing of parallel embedded code and trace the simulation results back to the initial models from which the code was generated. The whole tool-set relies on standard formats (UML/MARTE, Open Trace Format) to ensure a perennial use. This presentation will also presents the global RT-SIMEX process from retro-modeling to PSM/PIM model debugging.

Presenter: Laurent RIOUX Ph.D (THALES Research and Technology)

10:40-11:10 Principles and Tool for Time- and Space-Partitioned Systems

This presentation highlights the main challenges in the integration of Time- and Space-Partitioned (TSP) principles in mission critical systems, such as autonomous vehicles. The design of a TSP-based safety kernel to guarantee the functional safety of vehicle operation is addressed, together with the evolution of the Cheddar real-time scheduling analysis tool towards TSP-specific scheduling analysis and generation of the corresponding onboard computer configuration parameters.

Presenter: José Rufino (FCUL - Faculty of Sciences of University of Lisbon – Lisboa, Portugal)

11:10-11:40 MADES: "An effective UML/SysML/MARTE methodology for Real-Time Embedded Systems design and implementation"

This presentation presents an overview of the EU FP7 MADES project, that aims to develop novel model-driven techniques for the design, validation, simulation, and code generation of complex real-time and embedded systems for avionics and surveillance embedded systems industries. In this presentation, we will illustrate the MADES language built on an effective SysML/MARTE subset for embedded systems specification, along with verification & validation (V&V) and code generation aspects, related to the MADES case studies dealing with on-board and ground based radar systems.

Presenter: Imran Quadri PhD (Softeam)

11:40-12:10 PRESTO: “ Results from execution trace analysis “

This presentation presents results the global synoptic and results of the ARTEMIS PRESTO project.. This project focuses on RTES design process enriched of : (a) test traces exploitation (generated by test execution in the software integration phase induced by the industrial development process, to validate the requirements of the system) along with (b) platform models and (c) design space exploration techniques.

Presenter: Shuai Li (THALES Communications & Security)

14:00-14:30 ENOSYS: "Integrated modeling and synthesis tool flow for embedded system design"

The presentation will describe the ENOSYS FP7 project, which proposes a high abstraction level design methodology for the design and implementation of next-generation Systems-on-Chips (SoCs) in order to shorten time to market. The presentation outlines the ENOSYS methodology and illustrates some features of the project: such as SoC Co-Design using UML/MARTE, automated synthesis and code generation of hardware/software from high level UML models, software source code optimization and design space exploration

Presenter: Etienne Brosse (Softeam)

14:30-15:00 VERDE: Industrial results on component based modelling analysis

Presenter: Olivier Hachet (THALES Communications & Security)

15:30-16:00 MAENAD: “Model-based Analysis & Engineering of Novel Architectures for Dependable Electric Vehicles” (http://www.maenad.eu/)

Fully Electric Vehicles (FEV) promise clear benefits to society. At the same time, the engineering of FEV introduces significant new challenges. MAENAD is refining the EAST-ADL architecture description language for meeting these challenges.

Presenter: Ernest Wozniak (CEA LIST)

16:00-17:00 Open discussions on projects

ArtistDesign NoE

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