ArtistDesign NoE

20. Lecturers

Karl-Erik Arzen, Kim Larsen, Luca Benini, Paul Caspi — 2006-09-25T09:11:44Z

Lecturers

Prof. Karl-Erik Arzen

Lund University, Sweden

Karl-Erik Årzén was born in Malmö, Sweden on October 4, 1957. He received his M.Sc in Electrical Engineering and PhD in Automatic Control from Lund University in 1981 and 1987 respectively. He was appointed as professor in automatic control in 2000. He has also worked for ABB Corporate Research during 1992-1994. His research interests includes real-time systems, real-time and embedded control, control of computer software systems, discrete event and sequential control, and intelligent control systems. He has published more than 120 journal articles and conference papers. He is the leader of the Control for Embedded Systems cluster within the EU/IST Network of Excellence ARTIST2 since 2004. He was the chairman of the IEEE Control System Society Technical Committee on Real-Time Control, Computing, & Signal Processing 1999-2002. He is vice chairman of the IFAC Technical Committee on Real-Time Computing & Control since 2002. In 2006 he received the Guido Carlo-Stella award from the World Batch Forum for his contributions to manufacturing automation.

Prof. Dr. Luca Benini

University of Bologna, Italy

Luca Benini is a Full Professor at the Department of Electrical Engineering and Computer Science (DEIS) of the University of Bologna. He also holds a visiting faculty position at the Ecole Polytechnique Federale de Lausanne. He received a Ph.D. degree in electrical engineering from Stanford University in 1997.

Dr. Benini's research interests are in the design of system-on-chip platforms for embedded applications. He is also active in the area of energy-efficient smart sensors and sensor networks. He has published more than 300 papers in peer-reviewed international journals and conferences, four books and several book chapters. He has been program chair and vice-chair of Design Automation and Test in Europe Conference. He has been a member of the technical program committee and organizing committee of several technical conferences, including the Design Automation Conference, International Symposium on Low Power Design, the Symposium on Hardware-Software Codesign.

He is Associate Editor of the IEEE Transactions on Computer Aided Design of Circuits and Systems and the ACM Journal on Emerging Technologies in Computing Systems. He is a senior Member of the IEEE.

Paul Caspi

Verimag Laboratory, France

Paul Caspi graduated from "Ecole polytechnique (Paris)" and holds a "docteur ès sciences" degree in automatic control from "Institut national polytechnique de Grenoble. He is currently "directeur de recherche CNRS" at the Verimag laboratory in Grenoble.

His domain of interest is computer science applied to automatic control. He is mainly concerned with safety problems in critical applications, from both hardware and software points of view. This has led him to be involved in the design of Lustre, a data-flow programming language for safety-critical automatic control applications. Lustre has been chosen as the kernel language of the SCADE design environment used at Airbus for designing the flight control systems of Airbus commercial aircrafts. This achievement owed him to share the Monpetit prize of French "Académie des sciences".

He also served as a consultant for several French companies and administrations, on problems related to safety-critical computing systems.

Kim Larsen

Aalborg University Denmark

Kim Guldstrand Larsen (born 23 December 1957) holds an MSc in Mathematics and Computer Science from University of Aalborg, Denmark, and a PhD in Computer Science from Edinburgh University, Scotland. He is a Professor of Computer Science at Aalborg University, and Industrial Professor at Twente University, The Netherlands. In addition, Kim Guldstrand Larsen has visited, or has held visiting appointments, at research centres like ENS Cachan (France), Swedish Institute of Computer Science (Sweden), Uppsala University (Sweden), Twente University (The Netherlands) and Carnegie-Mellon University (U.S.A).

Kim Guldstrand Larsen is director of CISS, the Center for Embedded Software Center, co-director of BRICS, the center for Basic Research in Computer Science, and member of the strategic management board of the ARTIST2 Network of Excellence. Kim Guldstrand Larsen is member of the Royal Danish Academy of Sciences and Letters, Copenhagen, and is member of the Danish Academy of Technical Sciences. For a period of seven years he served as member of the Danish Natural Science Research Council.

Kim Guldstrand Larsen became Honorary Doctor (Honoris causa) at Uppsala University in 1999 for his outstanding contributions to the popular verification tool UPPAAL. In 2005 he received the Danish Citation Laureates Award, Thomson Scientific, as the most cited Danish computer scientist in the period 1990-2004.

Since 1987 Kim Guldstrand Larsen has written and/or edited 10 books, published 27 papers in international journals, and approximately 130 papers in international reviewed conferences. Kim has co-authored 6 software-tools, holds one patent and is prime investigator in the real-time verification tool UPPAAL (www.uppaal.com). Kim Guldstrand Larsen has given invited talks and course all over the work, including North-America, China, India, and most European countries. Kim Guldstrand Larsen is currentley ranked no. Ranked 531 on Citeseer an has H-number 34 according to Google Scholar.

Kim Guldstrand Larsen is editorial board member of the journals Formal Methods in System Design, Theoretical Computer Science and Nordic Journal of Computing. He is serving as a member of the steering committee for the ETAPS conference series. Also he is serving as member of the steering committees and was one of the original initiators for the CONCUR conference series, the TACAS conference series and the FORMATS workshop seriesI. n addition Kim Guldstrand Larsen has served as program committee member for numerous conferences and acted as program chair and organiser of the international conferences ICALP'98, CONCUR'01, CAV'02 and FORMATS'03.

ARTIST2 – Execution Platforms Cluster Meeting: Other participants

Luca Benini — 2006-09-01T14:14:20Z

Other Participants

Lothar Thiele ETHZ
Luca Benini UNIBO
Alexandru Andrei LIU
Kai Huang ETHZ
Martino Ruggiero UNIBO
Federico Angiolini UNIBO
Alessio Guerri UNIBO
Simone Medardoni UNIFE
Davide Brunelli UNIBO
Elisabetta Farella UNIBO
Rolf Ernst IDA
Shankar Mahadevan DTU

ARTIST2 – Execution Platforms Cluster Meeting: Presentations and downloads

Luca Benini — 2006-09-01T12:54:36Z

Presentations

Presenter: ESI-Jozef Hooman Title: Performance Research in the Boderc project Abstract: We present an overview of work on performance within the Boderc project. This includes a comparison of performance analysis methods on the radio-navigation system. We also report about industrial performance measurents and modeling. Finally, we mention control strategies, such as event-based control, to improve performance.

Presenter: IDA-Simon Schliecker Title: Analysis of memory and coprocessor accesses on MPSoCs

Presenter: ETHZ-Simon Künzli Title: Hybrid Approach to System-Level Performance Analysis Abstract: In this talk, we will briefly talk about a new, compositional performance evaluation method for embedded systems we developed during the last year. The new method combines existing approaches for system-level performance analysis; a formal method and a simulation-based approach. To enable this combination, we define the interfaces needed between the different performance evaluation methods. As a core of the approach, we propose a method to generate simulation stimuli from analytical models. In addition, we introduce a measure to assess the quality of a generated simulation trace with respect to its analytical description. The combined model was then used for a case study of an application running on a multiprocessor system.

Presenter: DTU- Jan Madsen Title: System Modeling Infrastructure

Presenter: Linköping- Petru Eles Title: ARTIST-Relevant Research from Linköping: latest results Abstract: Recent results which are relevant from the point of view of our work in ARTIST will be presented. We will first present our recent results in the context of communication dominated embedded systems In this context we will mention the timing analysis of the FlexRay Communication Protocol and the timing and buffer analysis for NoCs. Then we will briefly present our results in the context of predictability of multiprocessor applications. Here, we are concentrating on two aspects: (1) execution time estimation for multiprocessor systems with shared memory access and (2) predictability in the presence of transient faults.

Presenter: DEIS - Michela Milano Title: System Design Related Optimization Problems

Presenter: UNIFE- Davide Bertozzi Title: Communication and I/O architecture for highly integrated MPSoC platforms Abstract: As the level of system integration of MPSoC platforms keeps increasing, communication fabrics are evolving to support the communication scalability requirements, while not reverting to revolutionary network-based solutions yet. This results in complex segmented architectures where system performance (and eventually energy) tightly depends on the effectiveness of bus bridges, which are actually becoming true Intellectual Property blocks. At the same time, the I/O architecture is becoming the platform bottleneck, since most of processing data tend to be stored off-chip for storage size and technology reasons. In this presentation, I will illustrate the different performance and architectural requirements posed by the memory controller on the communication infrastructure in order to sustain system performance. Finally, the presentation will highlight the research challenges associated with the optimization of memory controller architecture.

Presenter: UPM- Jose L. Ayala Title: Low-power and Low-temperature Compilation for Embedded Processors Abstract: Advances in process technology allow new embedded devices to run multimedia applications with high computational complexity thanks to Very Large Instruction Word (VLIW) processors and high-performance processors. Also, the continuing advances in semiconductor technology have allowed dramatic performance gains for these archtectures. These improvements are due both to increasing clock rates as well as to advanced support for exploiting instruction-level parallelism and memory locality using the additional transistors available in each process generation. However, as a negative consequence, this causes a significant increase in power dissipation. As technology scales, higher power consumption coupled with smaller< chip area will result in higher power density, which in turn will lead< to higher power temperature on the chip. In fact, extrapolating the changes in microprocessor organization and the device miniaturization, one can project future power density to 200 W/cm2. This requires extensive efforts on cooling techniques which have shown to be complex and highly expensive. In our work, we provide a set of characterization methodologies and compilation-based optimizations which are able to minimize the power consumption and temperature of the device without performance impact. Moreover, traditional source-level transformations have been analyzed and their impact on the thermal behavior of the processor has been evaluated. Finally, this work presents a first attempt to achieve the low-power/low-temperature compilation.

Presenter: UCLM - Francisco Moya Title: An MPSOC Middleware: Network Transparency for on-chip/off-chip Modules

Presenter: ETHZ-Clemens Moser Title: Power management for solar-driven sensor nodes Abstract: Energy harvesting has recently emerged as a viable option to increase the lifetime of sensor nodes. In this field, we have conducted research in order to optimize the energy flow on a sensor node under real-time predictability constraints. The node model we are using consists of three major components: An energy source module, an energy storage module and a processing module. For this scenario, we developed scheduling algorithms which are tailored to the energy-driven nature of this problem. An on-line scheduling algorithm has been constructed (lazy scheduling), which is provably optimal if precise information about the energy resource is available. To this end, both the energy prediction of the energy harvesting module as well as the current energy level of the storage module has to be taken into account. Furthermore, we presented an admittance test that decides for periodic and bursty task sets, whether they can be scheduled without deadline violations. For this purpose, we introduce the concept of energy variability characterization curves (EVCC). Finally, the proposed theory leads to practical techniques for scheduling processes in energy harvesting systems as has been shown in extensive simulation studies.

Presenter: IDA-Arne Hamann Title: Sensitivity analysis & System Robustness Optimization

Presenter: UNIURB: Andrea Acquaviva Title: Energy Awareness in Batteryless Systems Abstract: Environmental energy is becoming a feasible alternative to traditional sources for energy constrained devices such as tiny wireless sensor nodes. To efficiently exploit harvesting energy, innovative management policies must be designed. In this presentation we discuss two examples of energy optimization strategies both in local and network context that show how batteryless devices can profit from environmental energy. First, we present an adaptation strategy based on device reconfiguration that exploits the intrinsic unpredictability of environmental energy to opportunistically trigger task remapping on reconfigurable hardware. Second, we formulate the problem of routing optimization for energy harvesting wireless sensor networks (EHWSNs), where the objective function changes from network lifetime as in battery operated ones, to sustainable workload. We finally present an optimal solution to this problem based on graph algorithms.

30. Sensor Networks

Jan Madsen, Lothar Thiele, Luca Benini, Rolf Ernst — 2006-07-11T11:45:41Z

The ACM Transactions on Sensor Networks (TOSN) publishes high-quality papers reporting significant results in the research and applications of distributed, wireless or wireline sensor and actuator networks.

As an interdisciplinary field, sensor networks draw upon many disciplines including signal processing, networking and protocols, embedded systems, information management, and distributed algorithms. Potential synergies among these fields are expected to open up new research directions.

The Transactions serves as a central, archival venue for the interdisciplinary sensor network research community. It covers research contributions that introduce new concepts, techniques, analyses, or architectures, as well as applied contributions that report on development of new tools and systems or experiences and experiments with high-impact, innovative applications. The Transactions places special attention to contributions on systemic approaches to sensor networks.

See it online!

Benini

Luca Benini — 2006-05-15T23:02:06Z