ArtistDesign NoE

Collette

2009-04-14T10:25:57Z

- 30. Core Team Leaders / Hardware Platforms and MPSoC Design

Kjeldsberg

2009-04-10T14:08:25Z

Research interests

Per Gunnar Kjeldsberg received his Sivilingeniør degree (MSc) in electrical engineering in 1992 from the Norwegian Institute of Technology. In 2001 he received the degree of Doktor ingeniør (PhD) from the same institution (now Norwegian University of Science and Technology, NTNU). During his doctoral studies, he focused on storage requirement estimation and optimization for data intensive applications. The research was performed in close cooperation with IMEC, in Leuven, Belgium, where he was a visiting researcher for nine months in all. His research interests are embedded hw/sw systems, with a focus on multi-media and digital signal processing applications. Between October 2005 and June 2006, Kjeldsberg was a visiting researcher at University of California, Irvine, Center for Embedded Computer Systems.

Role in leading conferences/journals/etc in the area

Kjeldsberg has (co-)authored a large number of conference and journal papers, and has been coauthor of a book in his field of interest. He is frequently used as reviewer for several international journals and conferences.

Notable past projects

CUBAN project Co-optimized Ubiqutious Broadband Access Networks with focus on cross-layer optimized implementation of DSP algorithms. CoDeVer/Embla Codesign, verification, and languages for embedded systems in close cooperation with industry partners

Further Information

Between 1992 and 1996 Kjeldsberg worked as a design engineer at Eidsvoll Electronics, designing communication control equipment based on embedded hw/sw solutions. Currently he is an Associate Professor at the Department of Electronics and Telecommunications, NTNU. Here he teaches several extensive undergraduate and graduate courses, and supervises a number of students at master and PhD level. Kjeldsberg is and has been a member of the board of directors both at the Faculty and in private companies.

Atienza

2009-04-10T13:58:42Z

Research interests

David Atienza received his MSc and PhD degrees in Computer Science from Complutense University of Madrid (UCM), Spain, and Inter-University Micro-Electronics Center (IMEC), Belgium, in 2001 and 2005, respectively. Currently he is Professor and Director of the Embedded Systems Laboratory (ESL) at Ecole Polytechnique Fédérale de Lausanne, Switzerland, and Adjunct Professor at the Computer Architecture and Automation Department of UCM. His research interests focus on design methodologies for high-performance embedded systems and Systems-on-Chip (SoC), including new thermal management techniques for Multi-Processor SoCs, dynamic memory management and memory hierarchy optimizations for embedded systems, novel architectures for logic and memories in forthcoming nano-scale electronics, Networks-on-Chip interconnection design, and low-power design of embedded systems. Role in leading conferences/journals/etc in the area In these fields, David Atienza is co-author of more than 90 publications in prestigious journals and international conferences, such as, IEEE TCAD, IEEE Micro, IEEE T-VLSI Systems, ACM TODAES, Elsevier-Integration: The VLSI Journal, DAC, ICCAD, DATE, ASP-DAC, etc. Also, he is part of the Technical Program Committee of the DATE, ICCAD, GLSVLSI, VLSI-SoC, RTAS, SBCCI and PATMOS conferences, and Associate Editor of IEEE Transactions on CAD (in the area of System-Level Design) and Elsevier Integration: The VLSI Journal. He is the general chair of VLSI-SoC 2010 and organizer of several conferences including GLSVLSI ‘09, ISVLSI ‘09 and SBCCI '09.

Notable past projects

MDDTNSB-B22: “Materials, Devices and Design Technologies for Nanoelectronic Systems Beyond 22 nm CMOS” project Development of reliability-aware design methodologies for emerging nano-scale electronics. CMOSAIC project Design of design 3D stacked processing architectures with interlayer cooling. TIN2005-ARCHITECT project HW/SW technologies for the design of high-performance processing systems

Awards / Decorations

David Atienza received the nomination as co-author for the "2004 DAC Best Paper Award" and the "2006 ICCAD Best Paper Award”. In September 2008 he was named IEEE Young Gold Member Coordinator in the area of EDA.

Further Information

Since 2008, he an elected member of the Executive Committee of the IEEE Council of Electronic Design Automation (CEDA).

Chakrabarty

2009-04-10T13:14:17Z

Research interests

Design and test of system-on-chip integrated circuits, microfluidics-based biochips (digital microfluidics, microelectrofluidics), and wireless/sensor networks.

Role in leading conferences/journals/etc in the area

He is an Editor of the Journal of Electronic Testing: Theory and Applications (JETTA), an Associate Editor of IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on VLSI Systems, IEEE Transactions on Biomedical Circuits and Systems, and ACM Journal on Emerging Technologies in Computing Systems. He serves on the editorial board of IEEE Design & Test of Computers. During 2006-2007, he served as an Associate Editor of IEEE Transactions on Circuits and Systems I, and before that as an Associate Editor of IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing.

Awards / Decorations

Prof. Chakrabarty is currently serving as an ACM Distinguished Speaker. He served as a Distinguished Visitor of the IEEE Computer Society for 2005-2007, and a Distinguished Lecturer of the IEEE Circuits and Systems Society for 2006-2007. He is also a recipient of the Humboldt Research Fellowship, awarded by the Alexander von Humboldt Foundation, Germany, in 2003.

Jantsch

2008-02-06T15:46:59Z

Department of Electronic, Communicatio, and Software Systems School for Information and Communication Technology - 30. Core Team Leaders / Modeling and Validation, Hardware Platforms and MPSoC Design

Tenhunen

2008-02-06T09:11:27Z

Prof. Hannu Tenhunen Royal Institute of Technology KTH/ICT/ECS/ESD Isafjordsgatan 39, 8th Floor Box 229, 16440 Kista Sweden - 30. Core Team Leaders / Hardware Platforms and MPSoC Design, Intercluster activity: Design for Adaptivity

Mamagkakis

2008-01-31T15:44:27Z

PhD Team Coordinator at IMEC- NES - Design Technology - 30. Core Team Leaders / Operating Systems and Networks, Hardware Platforms and MPSoC Design, Intercluster activity: Design for Predictability and Performance

Ernst

Rolf Ernst — 2006-05-15T23:14:07Z

- 30. Core Team Leaders / hardware modelling infrastructures, communication-centric systems, Execution Platforms, Hardware Platforms and MPSoC Design, Intercluster activity: Design for Predictability and Performance

Eles

Petru Eles — 2006-05-15T23:09:04Z

- 30. Core Team Leaders / hardware modelling infrastructures, communication-centric systems, Real-Time Components, Execution Platforms, Hardware Platforms and MPSoC Design, Intercluster activity: Design for Predictability and Performance

Thiele

Lothar Thiele — 2006-05-15T22:52:08Z

- 30. Core Team Leaders / communication-centric systems, Real-Time Components, Execution Platforms, Strategic Management Board, Strategic Management Board, Hardware Platforms and MPSoC Design, Intercluster activity: Design for Predictability and Performance