ArtistDesign NoE

40. Registration/Accomodation

Bruno Bouyssounouse — 2010-10-26T18:49:33Z

Inscriptions are closed - Synchron 2010 / hidden, sponsored by Artist

30. Participants

Bruno Bouyssounouse — 2010-10-26T18:32:33Z

AN Xin INRIA Rhône Alpes
ANDRE Charles UNS/INRIA/I3S
ATTAR Pejman INRIA
AUGER Cédric LRI
BAUDISCH Daniel University of Kaiserslautern
BERRY GÊrard INRIA
BERTHIER Nicolas VERIMAG
BOURKE Timothy INRIA / IRISA
BOUSSINOT Frédéric INRIA
BRANDT Jens University of Kaiserslautern
CAILLAUD Benoît INRIA Rennes / IRISA
COADOU Anthony I3S/INRIA
COHEN Albert INRIA
DAGHSEN Ahmed ESTACA
DE ROEVER Willem Paul University of Kiel
De SIMONE Robert INRIA
DEANTONI Julien UNS/INRIA/I3S
DELAVAL Gwenael LIG/Univ. Grenoble
GAFFE Daniel LEAT
GAMATIE Abdoulaye LIFL/CNRS/INRIA
GARCES Kelly I3S/INRIA
GASCON Régis UNS/INRIA/I3S
GERARD Léonard LIENS/LRI
GHICA DAn School of Computer Science, Birmingham
GLITIA Calin UNS/INRIA/I3S
GOMEZ CARDENAS Carlos I3S/INRIA
GONNORD Laure LIFL/USTL
HALBWACHS Nicolas VERIMAG / CNRS
JEANNET Bertrand INRIA Rhône Alpes
LE TALLEC Jean-François UNS/INRIA/I3S
LI HSIEN YOONG Li Hsien Uni. Auckland
LUGRIN Laurie VERIMAG
MAIZA Claire VERIMAG
MALLET Frédéric UNS/INRIA/I3S
MANDEL Louis Université Paris Sud
MARANINCHI Florence VERIMAG/INP
MOTIKA Christian Kiel University
MOY Matthieu VERIMAG
PAPAILIOPOULOU Virginia INRIA Paris-Rocquencourt
PARENT-VIGOUROUX Catherine VERIMAG
PARTHA S ROOP Partha INRIA Grenoble
PASTEUR Cédric LIENS
PERALDI FRATI Marie-Agnès UNS/INRIA/I3S
PLATEAU Florence Université Paris Sud
POTOP BUTUCARU Dumitru INRIA Paris-Rocquencourt
POUZET Marc ENS
RAYMOND Pascal VERIMAG/CNRS
RESSOUCHE Annie INRIA
RIVIERRE Yvan VERIMAG
SAUDRAIS Sébastieb ESTACA
SCHRAMMEL Peter INRIA
SMEDING Gideon INRIA
VON HANXLEDEN Reinhard Kiel University
YU Huafeng INRIA Rennes/IRISA

10. Synchron 2010

Bruno Bouyssounouse — 2010-10-26T18:24:42Z

Overview

Synchronous languages form a distinctive branch of Concurrency Theory. They are based on simple ideas of discrete logical time, explicit parallelism/concurrency and joint discrete reactions as operational behaviours. Their striking features is that such notions are provided to the plain designer him/herself, so that precise timing and time handling is seen as an integral part of functional design, not an extra-functional analysis and simulation afterthought addendum.

Sophisticated environments have been built around synchronous formalisms, both in academic and industrial settings. Their relevance to central concerns in embedded system design has amply been recognized in the past, including avionics, rail, factory automation, automotive, and of course digital circuits and on-chip system design.

Synchronous formalisms naturally enjoy both program and model quality, so that they can be both formally analysed and efficient executed without the discrepancy of awkward simulation schemes. Logical time can represent phenomena at very different level of abstractions altogether, in a unified way. The issues of component-based design, reuse and contracts find easy and natural formulations. They also find powerful and complexly crafted algorithmic solutions.

With the advent of multicore parallel programming models, on-chip networks, 3D digital circuits, sensor networks, low-power constraints and other such niceties, synchronous modelling and programming is faced with new challenges. Advancing the theory together with its connections to other neighbouring domains is a goal of the Synchron seminar Workshop, and the 17th edition is intending to advance this just like previous editions have.

Scientific organizers

Robert de SIMONE Research Director INRIA Sophia Antipolis Méditerranée
Charles ANDRE Professor University of Nice - Sophia Antipolis

Local Organization

Patricia LACHAUME Assistant INRIA Sophia Antipolis Méditerranée
Marie-Agnès PERALDI-FRATI Associate Professor University of Nice - Sophia Antipolis

Past Editions

Programs of the past editions are here.