Pedro AlbertosUniversidad Politécnica de Valencia
Role within the Artist2 European Network of Excellence |
Luis AlmeidaUniversidade de Aveiro / IEETA
Participates in Control for Embedded Systems |
Alejandro AlonsoUniversidad Politécnica de Madrid
Participates in Control for Embedded Systems Activity Leader - QoS Aware Components (JPRA-NoE Integration) |
Karl-Erik ÅrzénLUND University
Cluster Leader for Control for Embedded Systems Participates in Adaptive Real-Time |
Luca BeniniUniversity of Bologna
Participates in Execution Platforms Activity Leader - Resource-aware Design (NoE Integration) |
Saddek BensalemVerimag Laboratory
|
Albert BenvenisteINRIA / IRISA
|
Guillem BernatUniversity of York, Rapita Systems
Participates in Compilers and Timing Analysis |
Bruno BouyssounouseVerimag Laboratory
Member of the Strategic Management Board |
Alan BurnsUniversity of York
Co-leads Adaptive Real-Time Participates in Adaptive Real-Time Activity Leader - Real-Time Languages (JPRA-Cluster Integration) |
Giorgio ButtazzoScuola Superiore Sant'Anna
Cluster Leader for Adaptive Real-Time Participates in Control for Embedded Systems Activity Leader - Common Infrastructure for Adaptive Real-Time Systems (JPIA-Platform) |
Paul CaspiVerimag Laboratory
|
Alfons CrespoUniverdidad Polytécnica de Valencia
Participates in Testing and Verification Activity leader: Real-time techniques in control system implementations (Cluster Integration) |
Werner DammOFFIS
|
Juan de la PuenteUniversidad Politécnica de Madrid
|
Petru ElesLinkoping University
Participates in Execution Platforms Activity Leader - Design for Low Power (Cluster Integration) |
Rolf ErnstTechnische Universität Braunschweig
Activity Leader - Communication-centric Systems (JPRA-Cluster Integration) |
Christian FerdinandAbsInt
|
Alberto FerrariPARADES
|
Gerhard FohlerTechnische Universität Kaiserslautern - Dept of Real Time and Embedded Systems
Activity Leader - Flexible Resource Management for Real-time Systems (JPRA-Cluster Integration) |
Sébastien GérardCEA / SACLAY
Activity Leader - Development of UML for Real-time Embedded Systems (Cluster Integration) |
Alain GiraultINRIA
|
Prof. Dr. Sabine Glesner
TU Berlin |
Email: glesner@cs.tu-berlin.de | Tel: +49 30 314 - 73 258 |
Susanne GrafVerimag Laboratory
Activity Leader: Platform for Component Modelling and Verification |
Zdenek HanzalekCTU - Czech Technical University Prague
|
Michael Gonzalez HarbourUniversidad de Cantabria
|
Tom A. HenzingerEcole Polytechnique Fédérale de Lausanne
|
Niklas HolstiTidorum Ltd
|
Thierry JéronINRIA
|
Jean-Marc JezequelINRIA/IRISA
|
Bengt JonssonUppsala University
Cluster Leader for Real-Time Components Activity Leader - Component Based Design of Heterogeneous Systems (Cluster integration) |
Bernhard JoskoOFFIS
|
Hermann KopetzTechnische Universität Wien
|
Andreas KrallTechnische Universität Wien
|
Vladimir KuceraCTU - Czech Technical University Prague
|
Kim Guldstrad LarsenMember of the Strategic Management BoardCluster Leader for Testing and Verification |
Rainer LeupersRWTH Aachen
Participates in Compilers and Timing Analysis Participates in Execution Platforms |
Björn LisperMälardalen University
|
Jan MadsenTechnical University of Denmark
Cluster Leader for Execution Platforms Activity Leader - System Modelling Infrastructure (JPIA-Platform) |
Peter MarwedelTechnische Universität Dortmund
Cluster Leader for Compilers and Timing Analysis Participates in Execution Platforms Activity Leader - Compilers Platform (JPIA - Platform) |
Jacques PulouFrance Telecom R&D
|
Peter PuschnerTechnische Universität Wien
|
Anders RavnAalborg University
|
Alberto Sangiovanni-VincentelliPARADES
Participates in Real-Time Components |
Philippe SchnoebelenLSV/CNRS
|
Joseph SifakisResearch Director at Verimag Laboratory
Member of the Strategic Management Board Participates in Real-Time Components ARTIST2 Scientific Coordinator Chair of the Strategic Management Board |
Martin TörngrenKTH - Royal Institute of Technology Stockholm
Participates in Control for Embedded Systems Activity Leader - Design Tools for Embedded Control (JPIA-Platform) |
François TerrierCEA / SACLAY
Activity Leader - Development of UML for Real-time Embedded Systems (JPRA-Cluster Integration) |
Lothar ThieleETH Zurich
Participates in Real-Time Components Participates in Execution Platforms |
Eduardo TovarInstituto Politécnico do Porto - ISEP-IPP (Portugal)
Activity Leader - Dynamic and Pervasive Networking (Cluster Integration) |
Joseph van VlijmenACE
|
Jeroen VoetenTechnical University of Eindhoven
|
Reinhard WilhelmUniversität des Saarlandes
Participates in Execution Platforms Activity Leader - Timing Analysis Platform (JPIA-Platform) |
Pierre WolperCentre Fédéré en Vérification
|
Wang YiUniversity of Uppsala
|
(c) Artist Consortium, All Rights Reserved - 2006, 2007, 2008, 2009