ACESMB 2008

September 29th, 2008      Toulouse, France (in conjunction with MoDELS 2008) organised and funded by ARTIST 

Accepted Papers

Mohamed Yassin Chkouri, Anne Robert, Marius Bozga, and Joseph Sifakis. Translating AADL into BIP - Application to the Verification of Real-time Systems

Joseph Porter, Gabor Karsai, Peter Volgyesi, Harmon Nine, Peter Humke, Graham Hemingway, Ryan Thibodeaux, and Janos Sztipanovits. Towards Model-Based Integration of Tools and Techniques for Embedded Control System Design, Verification, and Implementation

Thomas Huining Feng, and Edward A. Lee. Scalable Models Using Model Transformation

Gregor Bochmann. Deriving component designs from global requirements

Daniel Monteverde, Alfredo Olivero, Sergio Yovine and Victor Braberman. VTS-based Specification and Verification of Behavioral Properties of AADL Models

Nikolay Pakulin, and Vladimir Rubanov. ISE language: the ADL for Efficient Development of Cross Toolkits

Eric Senn. Multi-Level power consumption modelling in the AADL design flow for DSP, GPP, and FPGA

Marie-Agnes Peraldi-Frati, and Yves Sorel. From high-level modelling of time in MARTE to real-time scheduling analysis

Matteo Bordin, Marco Panunzio, Carlo Santamaria, and Tullio Vardanega. A Reinterpretation of Patterns to Increase the Expressive Power of Model-Driven Engineering Approaches

Sabeur Lafi, Roger Champagne, Ammar Kouki, and Jean Belzile. Modeling Radio-Frequency Front-Ends Using SysML: A Case Study of a UMTS Transceiver

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