DataFlow Modeling for Embedded Systems 2008

May 5th, 2008       Pisa, Italy organised and funded by ARTIST 


The workshop starts at 9:00 and ends at 17:00 on May 5, 2008. The agenda contains the following presentations:

- 9:00 - 9:45 Introduction and Background - Johan Eker, Ericsson

- 9:45 - 10:45 An introduction to dataflow programming and the CAL actor language - Jörn W. Janneck, Xilinx Inc PPT

Abstract: The computing world is abuzz with talk about the need for and/or the benefits of parallelism---yet in spite of this, fundamentally new programming paradigms embracing parallelism as a fundamental concept in constructing complex systems remain thin on the ground and are usually confined to specialized application areas, or even specific
hardware platforms.

In this talk I present dataflow as a way of constructing concurrent systems and algorithms and introduce the CAL actor language as a medium for expressing dataflow actors. I outline some of the work that has been done around dataflow and CAL, including applications, implementation tools for hardware and software, and profiling.

- 10:45 - 11:15 Coffee

- 11:15 - 12:00 What does it take to realize CAL networks efficiently in software? - Carl von Platen, Ericsson PPT

Abstract: In addition to enhancing programmer productivity, dataflow models offer a good starting point for parallelization and vectorization, which are important transformations for multi-core architectures with vector instructions (including SIMD or "multimedia" instructions). Particularly restricted dataflow computation models, such as synchronous dataflow, allow for significant compile-time analysis and efficient realizations. In comparison, CAL networks offer more expressiveness. On the one hand, complex applications can be specified conveniently, on the other hand compile-time analysis is complicated. In particular, run-time scheduling of actors is required in the general case, but the associated overhead may be prohibitive. We discuss existing techniques for analysis and software synthesis of dataflow models and the challenges in applying them to CAL networks.

Bio: Carl von Platen is a researcher in the Software Research Group at Ericsson AB, Lund, Sweden. His research interests include development tools for embedded systems, code generation and code optimization. Prior to his employment at Ericsson, he headed the Compiler CoreTechnology Group at development tools provider IAR Systems AB, Uppsala, Sweden. His published work includes papers on development tools for embedded systems and patent applications in the fields of over-the-air software upgrades and software security. He received a MSc in Mathematics from Lund University in 1992.

- 12:00 - 13:00 Reconfigurable Video Coding (RVC): A New CAL Based Data Flow Specification and Implementation Paradigm for MPEG Codecs - MarcoMattavelli, EPFL PPT

Abstract: Multimedia coding technology, after about 20 years of active research, has delivered a rich variety of different and complex coding algorithms. Selecting an appropriate subset of these algorithms would, in principle, enable a codec designer to produce any desired trade-off between compression performance and implementation complexity. Currently, two obstacles prevent such possibility: 1) the monolithic specification of standard technology based on imperative reference SW models, 2) interoperability that demands that this selection process be “hard-wired” into the normative description of the codec, or at best, a number of choices codified within the media syntax (i.e MPEG profiles).

This talk presents an alternative paradigm for codec deployment that is currently under advanced standardization by MPEG, known as Reconfigurable Video Coding (RVC). The new paradigm is based on CAL data flow formalism. The approach is based on describing all video coding technology “algorithms” under the form of a “library” of coding algorithms using CAL formalism and an XML dialect for the description of the codec configurations. Using RVC, beside the intrinsic advantages of having a high level specification formalism, the final objective is to enable arbitrary combinations of fundamental algorithms to be assembled, without additional standardization steps, because everything necessary for decoding is delivered alongside the content itself. The side-information consists of a description of the content syntax, as well as a description of the decoder configuration. Decoder configuration information is provided as a description of the interconnections between algorithmic blocks.

The talk will briefly summarize the status of the MPEG RVC standardisation process, the role of the CAL data flow specification formalism, the different objectives achievable from the point of view of a standard body, the technical problems solved so far, the open issues, and the tools for synthesis of SW and HW from CAL models that are needed to support RVC specification on reconfigurable platforms.

Bio: Marco MATTAVELLI is currently the director of the LSM-GRAM (Multimedia Architecture Research Group) of EPFL. He has gained a wide experience in multimedia, signal and image processing, and telecommunication technologies starting with his first activities when he joined the "Philips Research Laboratories" of Eindhoven in the framework of EUREKA-95 (HDMAC) project since January 88. Main research activities regarded channel and source coding for optical recording and electronic photography. Since October 1991 he joined the "Signal Processing Laboratory" (LTS) of the "Swiss Federal Institute of Technology" (EPFL) where he got his PhD in 1996 with the thesis: "Motion analysis and estimation: from ill-posed discrete inverse linear problems to MPEG-2 coding". There, he has been involved in various projects, research and didactic activities. Since July 96 he joined the Signal processing Laboratory 3 of EPFL formerly "Integrated System Laboratory" (LSI) where he has been leading the work in ATLANTIC, EMPHASIS, OCCAMM, MOSES ACTS projects and in the ISO/IEC JTC1/SC29/WG11 standardization activities (better known as MPEG), for which he is currently Chairman of the Implementation Study Group (ISG). For his work and contributions on MPEG-4 implementation issues, in 1998 and 2003, he has received the ISO/IEC Award.

His major research activities and interest include: architectures and systems for video coding, real-time multimedia systems, video processing, motion analysis and estimation, neural networks for image and signal processing, applications of combinatorial optimization to signal processing. He holds patents in the multimedia and video processing fields. He is the author or co-author of more than 80 research papers and two books. He has been guest editor for the IEEE Trans. On Circuits and Systems for Video Technology and the Eurasip Journal of Embedded Systems. He has been visiting scientist at Xilinx Research Lab. in the summer of 2005.

- 13:00 - 14:30 Lunch

- 14:30 - 15:15 Software Synthesis from the CAL Language - Jean-Francois Nezan, INSA Rennes PPT

- 15:15 - 16:00 Some research directions in dataflow programming - Jörn W. Janneck, Xilinx Inc PPT

Abstract: Adopting dataflow as a general-purpose programming paradigm may solve some problems, but fortunately for those in research, doing so creates at least as many as it solves.

In this talk I will to outline some of the research directions that I believe are opened up as a result of the use of our very general form of dataflow to build real stuff. They might include
— static analysis tools
— hardware platforms
— implementation techniques/dataflow compilers
— dataflow languages
— profiling and profile analysis
— programming techniques ("dataflow design patterns")

- 16:00 - 16:30 Coffee

- 16:30 - Discussion Moderator: Karl-Erik Årzén

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