ARTIST Summer School in Europe 2009

September 7-11, 2009       Autrans (near Grenoble), France organised and funded by ARTIST 


Professor Tarek Abdelzaher

University of Illinois at Urbana Champaign, USA

Tarek Abdelzaher received his Ph.D. from the University of Michigan in 1999 on Quality of Service Adaptation in Real-Time Systems. He founded the Software Predictability Group at the University of Virginia until 2005. He is currently an Associate Professor at the Department of Computer Science, the University of Illinois at Urbana Champaign. He has authored/coauthored more than 100 refereed publications in real-time computing, distributed systems, sensor networks, and control. He is Editor-in-Chief of the Journal of Real-Time Systems, an Associate Editor of the IEEE Transactions on Mobile Computing, IEEE Transactions on Parallel and Distributed Systems, the ACM Transaction on Sensor Networks, and the Ad Hoc Networks Journal, as well as Editor of ACM SIGBED Review. He was Program Chair of RTAS 2004 and RTSS 2006, and General Chair of RTAS 2005, IPSN 2007, RTSS 2007, DCoSS 2008 and Sensys 2008. Abdelzaher’s research interests lie broadly in understanding and controlling the temporal properties of software systems in the face of increasing complexity, distribution, and degree of embedding in an external physical environment.

Professor Luis Almeida

University of Porto, Portugal

Luis Almeida is currently an associate professor at the Electrical and Computer Engineering Department of the University of Porto and a member of the Electronics and Telematics Engineering Institute of Aveiro in which he coordinated the Electronic Systems Lab between 2003 and early 2008. He is also a senior member of the IEEE, Computer Society, member of the Strategic Management Board of the EU/ICT NoE ArtistDesign, leader of the Real-Time Networks activity in that NoE, and a Trustee of the RoboCup Federation.

His current interests are in real-time communication protocols for embedded systems with an emphasis on mechanisms to support predictable operational flexibility as needed for dynamic QoS management, graceful degradation and open distributed real-time systems in general. He is also interested in control architectures for teams of autonomous mobile robots, focusing on distributed architectures to support global coordination and data fusion, and in flexible control approaches, particularly for networked control. He is a co-author of more than 150 refereed publications in international scientific conferences and journals in the areas of interest, and co-author of 3 patents and 6 book chapters, having participated in several EU and national projects and given numerous invited talks and short courses about related topics. He regularly participates in the organization and program committees of scientific events in the Real-Time Systems and Robotics communities, including RTSS, ECRTS, DATE, SIES, WFCS, ETFA and RoboCup.

Professor Michael Backes

Saarland University and MPI-SWS, Germany

Michael Backes has the chair of Information Security and Cryptography at the Department of Computer Science, Saarland University, Saarbrücken, Germany, since January 2006. Before joining Saarland University, he was a research staff member at the IBM Zurich Research Lab where he was responsible for research on formal verification of cryptographic protocols and web services security. He is the author of more than 60 research papers in security, privacy and cryptography, and served on program committees and as program chair of international conferences and workshops on these topics. He received the MS and PhD Degrees in computer science and the MS in mathematics from Saarland University.

Professor Sanjoy Baruah

University of North Carolina at Chapel Hill, USA

Sanjoy Baruah is a professor in the Department of Computer Science at the University of North Carolina at Chapel Hill. He received his Ph.D. from the University of Texas at Austin in 1993. His research and teaching interests are in scheduling theory, real-time and safety-critical system design, and resource-allocation and sharing in distributed computing environments.

Professor Luca Benini

University of Bologna, Italy

Luca Benini is a Full Professor at the University of Bologna. He also holds a visiting faculty position at the Ecole Polytecnique Federale de Lausanne (EPFL). He received a Ph.D. degree in electrical engineering from Stanford University in 1997. Dr. Benini’s research interests are in the design of systems for ambient intelligence, from multi-processor systems-on-chip/networks on chip to energy-efficient smart sensors and sensor networks.From there his research interest have spread into the field of biochips for the recognition of biological molecules, and into bioinformatics for the elaboration of the resulting information and further into more advanced algorithms for in silico biology. He has published more than 300 papers in peer-reviewed international journals and conferences, three books, several book chapters and two patents. He has been program chair and vice-chair of Design Automation and Test in Europe Conference. He has been a Member of the 2003 MEDEA+ EDA roadmap committee 2003. He is a member of the IST Embedded System Technology Platform Initiative (ARTEMIS): working group on Design Methodologies, a Member of the Strategic Management Board of the ArtistDesign Network of Excellenc and a Member of the Advisory group on Computing Systems of the IST Embedded Systems Unit.

Dr. Jan Beutel

ETH Zurich, Switzerland

Jan Beutel received his MSc and PhD in Electrical Engineering from the Swiss Federal Institute of Technology (ETH), Zurich in 2000 and 2005 respectively. He has been with u-blox AG, Zurich and spent time as a visiting researcher at the Berkeley Wireless Research Center. He is currently working as a senior researcher with Lothar Thiele at the Computer Engineering and Networks Lab (TIK), ETH Zurich and project leader with the National Competence Center on Research in Mobile Information and Communication Systems NCCR MICS. His research interests lie in the development test and validation of sensor network applications. He has been lead architect of the BTnode project, a platform for fast-prototyping of ad-hoc and sensor networks.

Professor Krishnendu (Krish) Chakrabarty

Duke University, USA

Krishnendu Chakrabarty received the B. Tech. degree from the Indian Institute of Technology, Kharagpur, in 1990, and the M.S.E. and Ph.D. degrees from the University of Michigan, Ann Arbor, in 1992 and 1995, respectively. He is now Professor of Electrical and Computer Engineering at Duke University. He is also a Chair Professor in Software Theory at the School of Software, Tsinghua University, Beijing, China. Prof. Chakrabarty is a recipient of the National Science Foundation Early Faculty (CAREER) award, the Office of Naval Research Young Investigator award, the Humboldt Research Fellowship from the Alexander von Humboldt Foundation, Germany, and several best papers awards at IEEE conferences. His current research projects include: testing and design-for-testability of integrated circuits; digital microfluidics and biochips, circuits and systems based on DNA self-assembly, and wireless sensor networks. He has authored seven books on these topics, published 300 papers in journals and refereed conference proceedings, and given over 120 invited, keynote, and plenary talks.

Prof. Chakrabarty is a Fellow of IEEE and a Distinguished Engineer of ACM. He is a 2009 Fellow of the Japan Society for the Promotion of Science (JSPS). He is recipient of the 2008 Duke University Graduate School Dean’s Award for excellence in mentoring. He served as a Distinguished Visitor of the IEEE Computer Society during 2005-2007, and as a Distinguished Lecturer of the IEEE Circuits and Systems Society during 2006-2007. Currently he serves as an ACM Distinguished Speaker. He is an Associate Editor of IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on VLSI Systems, IEEE Transactions on Biomedical Circuits and Systems, and the ACM Journal on Emerging Technologies in Computing Systems. He also serves as an Editor of IEEE Design & Test of Computers and of the Journal of Electronic Testing: Theory and Applications (JETTA).

Dr. Ing. Armando Walter Colombo

Schneider Electric Gmbh, Germany

Armando Walter Colombo (Dr.-Ing., 48) received the Doctor-Engineer Degree from the University of Erlangen-Nuremberg (Institute for Manufacturing Automation and Production Systems / Prof. Klaus Feldmann), Germany, in 1998.

In 2001 he joined the Anticipation and Architectures Group, R&D Department, Schneider Electric GmbH, Germany. Since November 2008 he has is Schneider Electric Edison L2 Group Senior Expert.

His research interests are in the fields of service-oriented architecture (SoA), collaborative automation, intelligent supervisory control, formal specification of flexible production systems.

Dr. Colombo has more than 180 publications (per-review) in journals, books, and chapters of books and conference proceedings.
He is a senior member of the IEEE and member of the Gesellschaft für Informatik e.V..
Dr. Colombo served/serves as Associated Editor of the IEEE Transactions on Industrial Informatics (2004-2007) and of the IEEE Transaction on Automation System Engineering (T-ASE / 2008-2010), and Associated Editor of the IFAC Associated Journal ATP-International. He is Senior Member of the IEEE IES Administrative Committee (AdCom), Chairman of the IEEE IES Committee on Industrial Agents and he served/serves s as advisor for the definition of the R&D priorities within the Framework Programs 6 and 7 of the European Commission (Directorate General Research), of WINOVA (Swedish Ministery for R&D) and NSERC (Canadian Government). He is listed in Who’s Who in the World /Engineering 99-00/01 and in Outstanding People of the XX Century (Bibliographic Center Cambridge, UK).

Professor Koen De Bosschere

Ghent University, Belgium

Koen De Bosschere was born in Oudenaarde, Belgium, in 1963. In 1986 and 1987 respectively, he graduated in electronic engineering and computer science at the Universiteit Gent. In 1992, he obtained his doctoral degree at the same university. He is now professor in the PARIS research group of the ELIS Department at the Universiteit Gent where he teaches courses on computer architecture and operating systems. His current research interests include: computer architecture, system software, code optimization. He is the coordinator of the ACES research network and of the European HiPEAC2 network.

Dr. Gilbert Edelin

Thales Research and Technology, France

Manages the Corporate Research Group on Information Science and Technology at Thales Research and Technology France. It encompasses the Embedded Systems Lab . Prior his current activities, he headed the corporate activities in computing architectures and tools for Signal Processing applicationsand the Digital Department of Thales Communications France involved in a wide range of Embedded platforms including FPGA based, system on chip, ASIC, and producing versatile embedded communication platforms and powerful signal processing machines. Prior to Thales, he was responsible for safety critical systems in Automotive and Aerospace Companies where, in the 80’s he introduced ASIC and EDA technologies.
He has worked in or managed several cooperative R&T projects in different National or European frameworks and participated to several programme or evaluation committees.

Professor Nicolas Halbwachs

Verimag Laboratory, France

After his thesis, prepared in 1979 under the supervision of Patrick Cousot, on the analysis of linear relations by abstract interpretation, Nicolas Halbwachs became, with Paul Caspi, one of the main designers of the synchronous data-flow language Lustre. He successively worked on the language design, compilation to software and hardware, on verification and testing techniques for synchronous programs, before coming back to the verification of numerical programs by abstract interpretation. He was strongly involved in the industrial transfer of Lustre technology.
In 2004, he was awarded with Paul Caspi, the Prize "Michel Monpetit" of the French Academy of Sciences. Since 2007, he is director of the Verimag laboratory.

Prof. Dr. Dr.h.c. Hermann Kopetz

TU Vienna, Austria

Hermann Kopetz received his PhD in physics "sub auspiciis praesidentis" from the University of Vienna, Austria in 1968. After eight years in Industry he accepted in 1978 an appointment as a Professor for Computer Process Control at the Technical University of West-Berlin, moving to the Technical University of Vienna in 1992. From 1990 to 1992 Kopetz was chairman of the IEEE Technical Committee on Fault-Tolerant Computing and from 1996 to 1998 Chairman of the IFIP WG 10.4 on Dependable Computing and Fault-Tolerance. Kopetz is a full member of the Austrian Academy of Science and is currently a member of the Information Society Advisory Group (ISTAG), advising the European Commission in Brussels in the domain of Information Technology. Kopetz is the chief architect of the Time-Triggered Architecture for dependable Embedded Systems. He has published a widely used textbook on Real-Time Systems, more than 150 papers and more than twenty patents on the topic of dependable embedded systems. Kopetz is a Fellow of the IEEE and received the IEEE Computer Society 2003 Technical Achievement Award with the citation: For outstanding contributions to the field of safety-critical real-time computing. In June 2007 he received the honorary degree of Dr. honoris causa from the University Paul Sabatier in Toulouse, France.

Professor Kim Guldstrand Larsen

University of Aalborg, Denmark

Kim Guldstrand Larsen (1957) is Professor in Computer Science at Aalborg University (1993- ), and has been Industrial Professor at Twente University, The Netherlands (2000-2007). He is currently director of CISS, the Centre for Embedded Software Systems, a national centre of excellence within ICT bridging between industry and research (2002- ). He is the leader of the Modeling and Validation Cluster within the ArtistDesign European Network of Excellence, and is director of the DaNES project (Danish Network for Intelligent Embedded Systems).

His research interests include modeling, verification, performance analysis of real-time and embedded systems with application and contributions to concurrency theory and model checking. In particular since 1995 he has been prime investigator of the tool UPPAAL and co-founder of the company UP4ALL International. He has published more than 150 publications in international journals and conferences as well as co-authored 6 software-tools.

He is or has been editorial board member of the journals: Formal Methods in System Design, Theoretical Computer Science and Nordic Journal of Computing. He is a member of the steering committee for the ETAPS conference series, the CONCUR conference series, the TACAS conference series and the FORMATS workshop series. He is member of the Royal Danish Academy of Sciences and Letters, Copenhagen, and is member of the Danish Academy of Technical Sciences.

Dr. Jan Reineke

Saarland University, Germany

Dr Reineke studied computer science in Oldenburg and Saarbrücken, receiving a Bachelor’s degree from the University of Oldenburg in 2003 and a Master’s from Saarland University in 2005. Since 2005, he was a PhD student under the supervision of Reinhard Wilhelm, and recently defended his PhD thesis on "Caches in WCET Analysis".

Prof. Dr. Lothar Thiele

ETH Zurich, Switzerland
After completing his Habilitation thesis from the Institute of Network Theory and Circuit Design of the Technical University Munich, Lothar Thiele joined the Information Systems Laboratory at Stanford University in 1987.

In 1988, he took up the chair of microelectronics at the Faculty of Engineering, University of Saarland, Saarbrucken, Germany. He joined ETH Zurich, Switzerland, as a full Professor of Computer Engineering, in 1994. He is leading the Computer Engineering and Networks Laboratory of ETH Zurich.

His research interests include models, methods and software tools for the design of embedded systems, embedded software and bioinspired optimization techniques.

In 1986 he received the "Dissertation Award" of the Technical University of Munich, in 1987, the "Outstanding Young Author Award" of the IEEE Circuits and Systems Society, in 1988, the Browder J. Thompson Memorial Award of the IEEE, and in 2000-2001, the "IBM Faculty Partnership Award". In 2004, he joined the German Academy of Natural Scientists Leopoldina. In 2005, he was the recipient of the Honorary Blaise Pascal Chair of University Leiden, The Netherlands.

Prof. Dr. Dr. h.c. mult. Reinhard Wilhelm

Saarland University, Germany

Research interests: Timing Analysis for Real-Time Systems, Static Program Analysis based on 3-valued logic, vulgo Shape Analysis, Compiler Construction, Algorithm Explanation.

Positions and Functions: Chair for Programming Languages and Compiler Construction at Saarland University, Scientific Director of Schloss Dagstuhl, the Leibniz Center for Informatics, Site Coordinator Saarbruecken in the AVACS Project, Coordinator of the Predator Project, Member of the Strategic Management Board for the Artist2 and ArtistDesign Networks of Excellence, Associate of AbsInt Angewandte Informatik GmbH, Member of the ACM SIGBED Executive Committee, Member of the Steering Committee of the International Conference on Embedded Software EMSOFT, Member at Large of the Steering Committee of the ACM Conference on Languages, Compilers, and Tools for Embedded Systems LCTES, Coorganizer of ARTIST workshop Reconciling Predictability with Performance (RePP), Member of the Scientific Advisory Board of CWI, Member of the Program Committees of SCOPES 2009, LCTES 2009, MEMOCODE 2009, RTSS 2008.

Dr. Eran Yahav

IBM T.J. Watson Research Center, USA
Eran Yahav received a B.Sc. degree from the Technion-Israel Institute of Technology in 1996, and a Ph.D. degree from Tel Aviv University in 2004. Since late 2004, he has been a Research Staff Member in the Software Technology Department at the IBM T. J. Watson Research Center in Hawthorne, New York.
His research interests include static and dynamic program analysis, program synthesis, and program verification.

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