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Research and Integration Activities for the "Compilers and Timing Analysis" cluster

The Joint Programme of Research and Integration Activities (JPRA & JPIA) for this cluster.

  • Platform-based Code Optimization and Verification Platform 

    The technical objective is to provide world-class code-synthesis and compiler tools for the generation of efficient machine code. Goals of the cluster include the integration of existing compiler-generation approaches allowing compilers for new architectures to be built quickly, efficiently and reliably.

  • Timing Analysis Platform 

    Combine the best components of existing European Timing-Analysis tools and prototypes in a standard tool architecture with well-defined textual interfaces. Our objective is to integrate European efforts on the Timing Analysis of Real-Time Systems, to preserve the existing lead of European Research and Industry in this important sector. The resulting platform will be used in teaching the technology all over Europe.

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