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Research and Integration Activities for the "Excution Platforms" cluster

The Joint Programme of Research and Integration Activities (JPRA & JPIA) for this cluster.

The activity assesses the state-of-the-art in models that take into consideration the particularities of various quasi-standard communication protocols during system analysis and scheduling. The communication infrastructure can be optimised in order to be adapted to the particularities of the implemented application. That meets a growing need in industry to consider formal techniques in embedded system design as a complement to traditional prototyping and simulation based approaches.

Design for Low Power

Power dissipation has become one of the most serious obstacles in the evolution of electronic systems. Historically, the transition from one CMOS technology generation to the next has been accompanied by a jump in power density, as well as increased active-state and stand-by power consumption. Furthermore, mainstream architectural design is moving towards energy-hungry programmable/configurable architecture meeting ever-increasing performance requirements. It is the objective of this activity to develop, promote and integrate methods that address power and energy issues across several layers of abstraction.

Resource-aware Design

Provide, through the integration of research activities of many participants, a viable path for resource-aware software and hardware development. The final objective is to achieve integration of research activities in concrete deliverables

System Modelling Infrastructure

Integrate ongoing research efforts on infrastructure modelling. This would replace prototyping hardware to reduce the cost and time required for designing embedded systems. This activity is strategic for providing one angle in tackling the growing complexity of embedded systems.