ArtistDesign Core Partners - by Cluster topics

The ArtistDesign NoE has 31 contractual core partners, and a large number of ’affiliated’, non-contractual partners actively participating.

The consortium is structured by research areas, called ’Clusters’, which reflect the following elements from of the embedded systems design flow, which is composed of the following cooperating activities, starting with requirements capture and leading to implementation. These activities must be well coordinated, and supported by tools and methods to ensure satisfactory levels of productivity and quality.

  • Cluster: Modeling and Validation 

    Establish a coherent body of modelling formalisms that support the component-based design and automatic analysis of embedded systems.

  • Cluster: SW Synthesis, Code Generation and Timing Analysis 

    Provide software synthesis, code generation and timing analysis tools which are required for modern embedded architectures and MPSoCs in particular.

  • Cluster: Operating Systems and Networks 

    Establish the fundamental basis of a new real-time software technology that can provide a more efficient and predictable support at the operating system and network level to the development of future embedded systems, characterized by high complexity, dynamic behaviour and distributed organisation.

  • Cluster: Hardware Platforms and MPSoC Design 

    Integrate different view points and approaches to MPSoC design and programming. The cluster will consider the hardware architecture and software components in their interaction, investigate tools for accurate estimation of certain design parameters (power, performance), and provide the designer with adequate support for design space exploration and optimisation.

  • Intercluster activity: Design for Adaptivity 

    An embedded hardware-software system is adaptive, if it can modify its behaviour and/or architecture to changing requirements. Adaptivity is increasingly important as the complexity and autonomy of embedded systems increases, and affects both hardware and software. At the software-level adaptivity is mainly concerned with flexible and adaptive resource scheduling, e.g., CPU time scheduling. At the hardware-level adaptivity includes both adaptation of operation modes, e.g., supply voltage and clock frequency, processor instruction sets, and dynamic management of hardware resources, e.g., processing elements and memory..

  • Intercluster activity: Design for Predictability and Performance 

    Embedded systems in many application domains are required to satisfy strict requirements on timing, while respecting limited supply of resources in terms of memory, processing power, power consumption, etc. All systems also have increasing demands on (average) performance, which has motivated the introduction of features such as caching, pipelining, and (now becoming very prominent) multiprocessor platforms. Almost all such efficiency increasing features drastically increase variability and decrease analyzability of response times, etc. and thus have a detrimental effect on predictability. Since the introduction of new architectural features is inevitable, it is important to • develop technology and design techniques for achieving predictability of systems built on modern platforms, and • investigate the trade-offs between performance and predictability.

  • Intercluster activity: Integration Driven by Industrial Applications 

    The industry-motivated part necessitates additional care as on one hand, we need to understand the concerns of companies that have been investing substantially in embedded system design such as the ones in automotive and aerospace domains; on the other hand, we need to understand the characteristics of emerging domains such as independent living and health, and nomadic. In both sectors, the links among the different players are not clear as yet when we look at the promises of these markets.
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