ArtistDesign Year2 Review

February 11-12, 2010      Brussels, Belgium

ArtistDesign Year 2 Deliverables
Period 2: Jan 1st 2009 - Dec 31st 2009

Applicable Description of Work
partner Deliverable ID Title

WP0: Joint Programme of Management Activities (JPMA)

UJF/Verimag D2-(0.2)-Y2 Project Management Report (the sum of the 5 chapters below)
UJF/Verimag D2-(0.2a)-Y2 ch. 1 - Executive Summary and Overview
Aalborg D2-(0.2b)-Y2 ch. 2 - Modelling and Validation
Dortmund D2-(0.2c)-Y2 ch. 3 - SW Synthesis, Code Generation and Timing Analysis
Pisa D2-(0.2d)-Y2 ch. 4 - Operating Systems and Networks
DTU D2-(0.2e)-Y2 ch. 5 - Hardware Platforms and MPSoC Design
Floralis D1-(0.1)-Y2 Periodic Report

WP1: Joint Programme of Integration Activities (JPIA)

UJF/Verimag D3-(1.0)-Y2 Integration Activities Report

WP2: Joint Programme of Activities for Spreading Excellence (JPASE)

UJF/Verimag D4-(2.0)-Y2 Spreading Excellence Report

WP3: Modeling and Validation (JPRA)

UJF/Verimag D5-(3.1)-Y2 Modelling
Aalborg D6-(3.2)-Y2 Validation

WP4: Software Synthesis, Code Generation
and Timing Analysis (JPRA)

Dortmund D7-(4.1)-Y2 Software Synthesis, Code Generation
Saarland D8-(4.2)-Y2 Timing Analysis

WP5: Operating Systems and Networks (JPRA)

Pisa D9-(5.1)-Y2 Resource-aware Operating Systems
York D10-(5.2)-Y2 Scheduling and Resource Management
Univ. Porto D11-(5.3)-Y2 Real-Time Networks

WP6: Hardware Platforms and MPSoC (JPRA)

Bologna D12-(6.1)-Y2 Platform and MPSoC Design
DTU D13-(6.2)-Y2 Platform and MPSoC Analysis

WP7: Transversal Integration (JPRA)

Lund D14-(7.1)-Y2 Design for Adaptivity
Uppsala D15-(7.2)-Y2 Design for Predictability
Trento D16-(7.3)-Y2 Integration Driven by Industrial Applications

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