August 1-10, 2007 Suzhou (near Shanghai), China | organised and funded by ARTIST |
Luca Benini University of Bologna |
SoC platforms: modeling and analysis![]() ![]() ![]() ![]() |
Luca Benini University of Bologna |
MPSoCs - Multi-core HW platformsWhy MPSoCs:![]() ![]() ![]() ![]() |
Luca Benini University of Bologna |
MPSoCs - Software platforms![]() ![]() ![]() Industrial standardization intiatives |
Luca Benini University of Bologna |
Design technology for MPSoCs![]() ![]() |
Karl-Erik Arzen Lund University |
Introduction to Feedback ControlThe role of feedback. Models and linearization. Stability. State-space and input-output models. Pole-placement. State-feedback and observers. Feedforward. |
Karl-Erik Arzen Lund University |
Computer Implementation of Control SystemsDiscretization of continuous-time control designs. Discrete-time control design. Aliasing. Anti-windup. Mode-handling. Numerics. PID control example. Task models for control. |
Karl-Erik Arzen Lund University |
Interaction between Control and SchedulingInteraction between control design and computer implementation. Temporal robustness. The effects of latencies and jitter on control performance. The Jitter Margin. The Control Server Model. Networked Embedded Control. |
Karl-Erik Arzen Lund University |
Co-Design ToolsTrueTime – co-simulation of real-time kernels, networks, and continuous plants. Jitterbug – analytical temporal robustness evaluation of control loops. Several examples and demos will be shown. |
Karl-Erik Arzen Lund University |
Control of Computer SystemsExamples of feedback in computer and communication systems. Queue-length control. Control of web-servers. Feedback scheduling in control systems. Feedback-based resource management. Control in Communication Networks. |
Paul Caspi VERIMAG |
Model-based Development for Embedded Control SystemsIntroduction and ConclusionModelling ![]() ![]() Code generation ![]() ![]() Faithfulness ![]() ![]() ![]() |
Kim Larsen Aalborg University |
Validation of Real Time and Embedded Systems![]() ![]() ![]() ![]() ![]() ![]() ![]() ![]() |
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